The invention relates to digital-to-analog converters, and more particularly to CMOS circuitry for digital-to-analog converters.
A digital-to-analog converter circuit useful in decoding digitized audio signals is described in copending allowed patent application "LEVEL SHIFTING CIRCUITRY FOR SERIAL-TO-PARALLEL CONVERTER", Ser. No. 829,707, filed Feb. 13, 1986, incorporated herein by reference. While the circuit described in that patent application has been commercially very successful for making compact disk players, it requires a +5 volt power supply and a -5 volt power supply. Bipolar integrated circuit technology is utilized. It would be desirable to provide an even lower cost, lower power digital-to-analog converter that is useful in making high fidelity audio products. However, achieving an acceptably low level of harmonic distortion in a serial digital to analog converter implemented using CMOS technology and dissipating sufficiently low amounts of power to be acceptable for portable, battery-powered high fidelity audio products presents an extremely difficult challenge. The requirement of the harmonic distortion specifications can be translated into a requirement for 13 bit linearity. The highest previously achievable linearity of a CMOS DAC is believed to be 11 or 12 bits. When CMOS technology is used to implement DACs with accuracy greater than about ten to eleven bits, achieving the desired accuracy occurs at the expense of making very large geometry N-channel and P-channel MOSFETS. For the particular type of DAC required for high fidelity audio products, a relatively fast DAC settling time is required. The non-linearity of CMOS amplifiers and the need to have summing junctions between ground and +5 volts presents considerable difficulty when prior CMOS circuits are used as the basis of an improved design to meet the above indicated objectives. More accurate, temperature invariant reference voltages are required, which heretofore have been unachievable with CMOS circuit technology operating from a single 5 volt power supply. The problem of precisely matching N-channel and P-channel bit switch MOSFETs in voltage dividing resistive ladders which much be utilized to achieve the required 13 bits of linearity has not been solved for a 5 volt CMOS DAC prior to the present invention. It should be appreciated that circuit techniques and connections that have been successful in solving various problems in bipolar integrated circuit technology often are not directly applicable to CMOS integrated circuit technology, particularly when objectives of low cost, single 5 volt power supply operation and high frequency response need to be met.